Micro Via in Aerospace Applications

The heart of every printed circuit board is the conductive pathway through which electrical signals travel. To establish this, holes are drilled through the PCB layers and then plated with copper to form a conductive connection between them. These are known as plated through-holes or vias. For higher density designs, manufacturers often drill smaller holes, called microvias, to facilitate a more efficient signal path. Compared to standard vias, microvias offer enhanced performance in several key areas.

micro via offer superior thermal conductivity allowing the PCB to run cooler, which is beneficial for high-speed signals and other demanding applications. Additionally, their smaller walls allow for a more efficient signal path, reducing the possibility of crosstalk. This makes them ideal for high-speed designs, such as those used in mobile phones and other consumer electronics.

While the advantages of microvias are many, their use can also lead to significant challenges if not managed carefully. One issue arises from the differing rates of expansion between copper and glass epoxy. This can cause connections to fail during the reflow process when the PCB is assembled. Another potential problem comes from the difficulty of achieving consistency in fill and plating, especially when multiple layers are involved.

The Role of Micro Via in Aerospace Applications

In order to address these issues, manufacturers use a variety of tests to ensure that the microvias will be able to withstand manufacturing and operational stresses. Specifically, electrical testing is used to verify the continuity and resistance of the via connections, while thermal and mechanical stress testing simulates the conditions under which the PCB will be operated.

Aside from these concerns, the most important factor in ensuring the long-term reliability of microvias is the quality of the substrate material that they are built on. This is because the choice of substrate material has a direct impact on the dielectric constant of the microvia walls and the overall electrical performance of the PCB.

To help prevent these types of failures, designers can use a staggered structure to stack the microvias rather than in a continuous row. This design can save space on the PCB and allows the microvias to be tracked away from buried or blind via holes. Moreover, a good practice is to restrict the number of layers in a stacked structure. The reason is that stacked structures are more susceptible to failure due to their greater exposure to thermal stress during the solder reflow process. This is due to the fact that copper tends to curve inward around the neck region of the via when plated, making it more vulnerable to cracking in this area during thermal cycling or strong vibration.